{"id":48,"date":"2016-12-02T16:04:59","date_gmt":"2016-12-02T16:04:59","guid":{"rendered":"https:\/\/dei.fe.up.pt\/specs\/?page_id=48"},"modified":"2017-04-19T20:34:39","modified_gmt":"2017-04-19T20:34:39","slug":"projects","status":"publish","type":"page","link":"https:\/\/dei.fe.up.pt\/compsysold\/projects\/","title":{"rendered":"Projects"},"content":{"rendered":"<div id=\"pl-48\"  class=\"panel-layout\" ><div id=\"pg-48-0\"  class=\"panel-grid panel-no-style\" ><div id=\"pgc-48-0-0\"  class=\"panel-grid-cell\" ><div id=\"panel-48-0-0-0\" class=\"so-panel widget widget_siteorigin-panels-postloop panel-first-child panel-last-child\" data-index=\"0\" >\n\t<div id=\"vantage-grid-loop\" class=\"vantage-grid-loop grid-loop-columns-4\">\n\t\t\t\t\t<article class=\"grid-post post-147 post type-post status-publish format-standard hentry category-project\">\n\n\t\t\t\t\n\t\t\t\t<h3><a href=\"https:\/\/dei.fe.up.pt\/compsysold\/2017\/04\/19\/rendering-fpgas-for-multi-core-embedded-computing\/\">Rendering FPGAs for Multi-Core Embedded Computing<\/a><\/h3>\n\t\t\t\t<div class=\"excerpt\"><p>http:\/\/www.reflect-project.eu Abstract This project will develop, implement and evaluate a novel compilation and synthesis system approach for FPGA-based platforms as outlined in the figure above. We rely on Aspect-Oriented (AO) Specifications (AOS) to convey critical domain knowledge to a mapping engine while preserving the advantages of a high-level imperative programming paradigm in early software development [&hellip;]<\/p>\n<\/div>\n\t\t\t\t\t\t\t\t\t\t\t<\/article>\n\t\t\t\t\t\t<article class=\"grid-post post-145 post type-post status-publish format-standard hentry category-project\">\n\n\t\t\t\t\n\t\t\t\t<h3><a href=\"https:\/\/dei.fe.up.pt\/compsysold\/2017\/04\/19\/ramtedra-runtime-adaptive-mapping-techniques-for-dynamically-reconfigurable-architectures\/\">RAMTEDRA &#8211; Runtime Adaptive Mapping Techniques for Dynamically Reconfigurable Architectures<\/a><\/h3>\n\t\t\t\t<div class=\"excerpt\"><p>Duration: 2 years, May. 2010 Abstract In this project we propose to research and develop (runtime) techniques to dynamically adapt both software and hardware components according to the hardware resources available during runtime. We will research schemes for dynamic reconfiguration of computing engines coupled to a microprocessor. Specifically, we will use a regular expression and [&hellip;]<\/p>\n<\/div>\n\t\t\t\t\t\t\t\t\t\t\t<\/article>\n\t\t\t\t\t\t<article class=\"grid-post post-142 post type-post status-publish format-standard hentry category-project\">\n\n\t\t\t\t\n\t\t\t\t<h3><a href=\"https:\/\/dei.fe.up.pt\/compsysold\/2017\/04\/19\/cobaya-closing-the-compilation-gap-between-algorithms-and-coarse-grained-reconfigurable-array-architectures\/\">Cobaya: Closing The Compilation Gap Between Algorithms And Coarse-Grained Reconfigurable Array Architectures<\/a><\/h3>\n\t\t\t\t<div class=\"excerpt\"><p>Jo\u00e3o Manuel Paiva Cardoso, Faculdade de Engenharia da Universidade do Porto (FE\/UP). \u20ac42,397. PTDC\/EEA-ELC\/70272\/2006 Information Main Research Area Electrical Engineering &#8211; Electronics and Computers Keywords Compilers Reconfigurable Computing Coarse-Grained Arrays FPGAs Funding 42,397.00 \u20ac Institutions Main Contractor Faculdade de Engenharia da Universidade do Porto (FE\/UP) Main Research Unit Instituto de Engenharia de Sistemas e Computadores, [&hellip;]<\/p>\n<\/div>\n\t\t\t\t\t\t\t\t\t\t\t<\/article>\n\t\t\t\t\t\t<article class=\"grid-post post-140 post type-post status-publish format-standard hentry category-project\">\n\n\t\t\t\t\n\t\t\t\t<h3><a href=\"https:\/\/dei.fe.up.pt\/compsysold\/2017\/04\/19\/amadeus-aspects-and-compiler-optimizations-for-matlab-system-development\/\">Amadeus: Aspects And Compiler Optimizations For Matlab System Development<\/a><\/h3>\n\t\t\t\t<div class=\"excerpt\"><p>Jo\u00e3o Manuel Paiva Cardoso, Faculdade de Engenharia da Universidade do Porto (FE\/UP). \u20ac106,000. PTDC\/EIA\/70271\/2006 Information Main Research Area: Computer Engineering Secondary Research Area: Electrical Engineering &#8211; Electronics and Computers Keywords: Compiler optimizations Aspects MATLAB System Engineering Funding 106,000.00 \u20ac Institutions Main Contractor Faculdade de Engenharia da Universidade do Porto (FE\/UP) Participating Institutions Instituto de Desenvolvimento [&hellip;]<\/p>\n<\/div>\n\t\t\t\t\t\t\t\t\t\t\t<\/article>\n\t\t\t\t\t\t\t<div class=\"clear\"><\/div>\n\t\t\t\t\t<\/div>\n\n\t<\/div><\/div><\/div><\/div>","protected":false},"excerpt":{"rendered":"<p>Rendering FPGAs for Multi-Core Embedded Computing http:\/\/www.reflect-project.eu Abstract This project will develop, implement and evaluate a novel compilation and synthesis system approach for FPGA-based platforms as outlined in the figure above. We rely on Aspect-Oriented (AO) Specifications (AOS) to convey critical domain knowledge to a mapping engine while preserving the advantages of a high-level imperative [&hellip;]<\/p>\n","protected":false},"author":7,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"inline_featured_image":false,"footnotes":""},"class_list":["post-48","page","type-page","status-publish","hentry","post"],"_links":{"self":[{"href":"https:\/\/dei.fe.up.pt\/compsysold\/wp-json\/wp\/v2\/pages\/48","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/dei.fe.up.pt\/compsysold\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/dei.fe.up.pt\/compsysold\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/dei.fe.up.pt\/compsysold\/wp-json\/wp\/v2\/users\/7"}],"replies":[{"embeddable":true,"href":"https:\/\/dei.fe.up.pt\/compsysold\/wp-json\/wp\/v2\/comments?post=48"}],"version-history":[{"count":3,"href":"https:\/\/dei.fe.up.pt\/compsysold\/wp-json\/wp\/v2\/pages\/48\/revisions"}],"predecessor-version":[{"id":151,"href":"https:\/\/dei.fe.up.pt\/compsysold\/wp-json\/wp\/v2\/pages\/48\/revisions\/151"}],"wp:attachment":[{"href":"https:\/\/dei.fe.up.pt\/compsysold\/wp-json\/wp\/v2\/media?parent=48"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}